Integrated circuit fabrication advances have created a continual improvement in the density and speed of integrated circuits. Recently, metallic interconnection of electrical signals on integrated circuits has become problematic for propagating high speed signals over the relatively long distances of a semiconductor device.
Long signal runs and large fan-outs on some signals create propagation delays that approach, or even exceed the frequency of the signals. As an example, clock signals must be distributed across long distances and drive a large number of devices and buffers. To manage the loading and propagation delays of these clock signals elaborate clock trees with carefully balanced loads are often required to ensure that the clock signal edges have minimal skew at the clocked devices. Similar problems develop for data and control busses that must traverse long distances, have high fan-out requirements, or combinations thereof.
In other technological areas, optical signal routing and signal manipulation has become more prevalent with the advent of high bandwidth communication technologies. Naturally, to accommodate the optical signals, while still allowing processing of electrical signals, a large number of electrical-to-optical converters and optical-to-electrical converters have been developed.
Recently, semiconductor devices have been proposed that combine optical devices with conventional large scale bipolar and Complementary Metal Oxide Semiconductor (CMOS) devices. In addition, some proposals have been made to route optical signals over the top of conventional bipolar and CMOS electrical devices, thereby distributing optical signals to various regions of a semiconductor device.
However, fabricating optical devices or optical waveguides in layers above the semiconductor devices may have undesired effects. For example, the fabrication steps required to develop the optical layers may affect the device characteristics of already fabricated electrical devices below the optical layers. In addition, fabrication process limitation may require relatively thin optical layers, such that optical signals may interfere with electrical signal and electrical device operation on lower layers. Similarly, the electrical signals may interfere with propagation and generation of optical signals in the optical layers above the electrical signals and electrical devices.
Accordingly, there is a need for new signal routing technologies to distribute signals with minimal skew across long expanses of a semiconductor die and also increased separation and isolation between electrical signals and optical signals. There is also a need to develop these new signal routing technologies with a process that will have a reduced effect on the operation parameters of conventional bipolar and CMOS devices.